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Long compiling Ladder time

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Can you please attach the project?

I want to check why the compilation takes so long, since 10-30 minutes is not usual.

 

When you compile the project, do you see that it is stuck for a long time on Compiling Ladder?

Do you see the Hard-drive led on your computer blinking like crazy or stays on? (an indication for a lot of HDD activity)?

If you open the Task Manager while UniLogic is compiling the Ladder, or whatever is taking a long time to compile, do you see UniLogic taking high CPU usage? (How much CPU usage does it take?, how many Physical and Logical cores your CPU has? Meaning: My CPU has 4 Physical cores, but since it has Hyper Threading support, then it has 8 logical cores)

 

Thanks

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dear, i send you the project by email.

the HDD dont blink crazy or still on, when compiling. the task manager show me an activity not more than 10% to 15% of use of CPU, and no more than 50% of the memory of the computer.

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Well, I got your project, and both me and Reuven from the Support, did not encounter any long compilation time.

Compiling the entire project with Build-All took about 23 seconds.

 

10%-15% looks high to me. The Ladder compilation is currently using 1 thread (it is not parallel), and if your computer has 8 logical cores, then 100% / 8 gives 12.5%, which is just between 10 and 15.

If the CPU is busy for a long time in the compilation, then something is causing it to work more than it should.

 

You might try what Reuven suggested by email:

1.    Reboot your PC

2.    Go to Windows Start >Run: %localappdata%\Temp

3.    You may find some files in that folder. Please delete all of the .tmp files

4.    Go to UniLogic shortcut on your desktop > Right Click > Run as Administrator

5.    Open the project and perform "Rebuild-All"

 

 

If it doesn't work, then I would like to see the problem myself, and probably debug it with some tools (like dotTrace, etc), which can give me an indication on what the CPU is busy on (on what functions it is wasting most of the time).
Please contact our support for a remote session. Please note that 6-7 hours from now, our work day is over, and we enter a long Holiday weekend, so we will only be available on next Monday, so if we can't schedule a remote session for today, then we would have to schedule it for next week.

 

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dear saragani, sorry by the delay , but i was work out of my city the last week and today i continued with the project in unilogic.

i check de cores of my computer, this have 2 physical cores and 4 logical cores (it have a intel I7-6500U processor, with windows 10 OS).

i reboot my computer, and unistall and reinstall the unilogic software again. i compile offline the project and this  take a few seconds now. i dont know what happened really , if was a computer problem, or unilogic software problem, but now work well.

thanks for you asistance, and if i have any problem or the same problem, i talk with yours again.

 

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Yesterday I had the same problem with the long ladder compiling time. Each compiling took more than 10 minutes.

I rebooted the PC several times and tried to delete the temp files (it is possible to delete files like JET5F11.tmp, however I cannot delete files like ~DF88DF201B390B0325.TMP) and executed the rebuild all function. Nothing was reducing the compilation time.
In the evening, I upgraded the software from 1.26.90 to 1.28.26. However, the compilation took also a long time. So I still use the 1.26.90 version.

Today the compilation was faster (around 2 min.) Nevertheless, each download could only performed with a reset. Even if just one coil was added. Normally, the PLC needs only a reset if you change something in the hardware or after adding a tag in the data sampler...

To make things even more confusing. In the evening several downloads where performed without the need of a reset. (I was not rebooting the PC, I did not executed the rebuild all function)

The project file has 19 MB; 54 % of the retained memory are used (manly due to retained DataTable); and 14 % of non retained memory.

What can cause the long compiling time? Can I send you the project? What is the difference between compiling and rebuild all?

Another strange behaviour have retained timers. The sometimes lose their pre-set value.

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Yes, send me the project. I'm not sure from your post of the project was compiling fast up until now, or the problem started a while ago.

Long compile time can also be a result of the size of the project. Large functions, and a lot of functions also increase the ladder compile time.

 

When compiling, every feature is being compiled and the compilation cache is being saved, so it won't need to be re-compiled.

When you change something, in a screen, or a function, the compilation cache of that screen / function etc is being cleared.

 

When you click on compile, UniLogic iterates on all the features, and see what's need to be re-compiled.

When you click Rebuild All, then all the compilation caches are cleared, and then the compilation starts (So everything is being re-compiled from scratch. This is why it is called Rebuild All).

 

Are all retained tags lose their value, or just the timers? 

What the value of the timers become? (Zero?)

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I sent you the project via wetransfer.

Is there a log file where you can see what function needs recompilation? This would help when the compilation time problem occurs again. There was no (or at least not much) difference in time between compile and rebuild all. (In addition to the compilation time, the PLC needed a reset after small ladder program changes.)

All timers pre-set values become zero.

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Rebuild-All for took on the ladder part 5:45

Compilation time might increase dramatically if HDD is busy, or the free RAM is low (usually when used RAM is above ~85%), which causes windows to copy a lot of stuff to the page file.

There isn't any log that shows which function needs recompilation.

 

Were all the Retained tags reset and got a value of 0? (or empty string in case of a string).

I know that the PLC should call the Init retained tags internal function if it detects that the retained memory area has been garbaged (Like when the battery is low).

Currently I don't know why the tag got a 0 value.

 

I don't know why the PLC needed a reset on every small change in ladder. Did you accidentally remember what was the reason for the reset? (On the Project diff window, it marks the "Requires Reset")

 

 

 

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Thanks for your support.

Maby I have to increase the RAM of my laptop (currently 8 GB).
Do you think that the project is too big or at the limit for the PLC?

I did not made a print screen of the donwload dialog. The reset icon was next to all functions I modified. E.g. I changed one ladder element -> in download dialog the reset was required due to this function were the modification was done.

In this case only the timers were affected from the memory loss.

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No, it is still good for the PLC.

I assume that you have an SSD on your Laptop. When compiling, look at the task manager and see if there processes other than UniLogic that takes a lot of CPU and Drive usage (f.e. the System process).

Right now I understand that the compile time is back to normal.

How much time it takes you to Rebuild All ?(take only the Ladder time in the entire Rebuild All).

 

I don't know why the compiler thinks that the the Ladder required a reset. I'm guessing that I need to debug it in real-time in order to find out why, so if it happens to you again contact the support, and ask for a remote session (Hopefully I will be available, and if not maybe someone else from the R&D).

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Correct, right now everything is back to normal. No reset required after ladder software changes. Completion time after ladder changes below 1 min.

A rebuild all (ladder time) takes now approximately 5:35.

If it happens again, I will contact you and we can debug it with a TeamViewer remote session.
(What is the best way to contact the support? – The page http://forum.unitronics.com/support/ seems to be down)

Thanks for your help.

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Today I am back in office and we have a VPN connection to our facility.

I modified two text boxes in one HMI screen. However, I cannot download it without a reset.

 

 

Due to the VPN connection to the facility, TeamViewer is not ready for other connections. When I get this solved, I will ask for a remote session so that you can have a look at it.

Requires_Reset.png

Edited by Daniel_EWW

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New situation...
As I mentioned before I use a VPN connection to the facility.
Now I opened a wireless mobile connection to get an additional internet for TeamViewer support.

I tried to download the same modification like before.

And... no more reset is required.

This could have been also the problem when I was at the facility site. I did not had an internet access before we finished the installation of the remote access router.

No_Reset_Required.png

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Well, when communicating with the PLC, UniLogic asks the PLC which features it supports changing without the need to reset, so maybe due to connection problems, the request fails, and the PC gets an empty list.

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On 10/27/2019 at 11:48 AM, Ausman said:

@Cara Bereck Levy  @Saragani

Given "Support"  is a prominent tab over all the forum, can we please get this incorrect address corrected.

cheers,

Aus

Thanks for cluing me in, Aus--done.

That page had a button 'create support request' - the page would be blank if the user had not ever created a request :)
But it is really much more logical to bring them to the support portal - which didn't exist when the forum was designed.

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