Merle Posted October 18, 2023 Report Posted October 18, 2023 Hello, I'm using a US5-B10-TA30 PLC+HMI with an encoder. I'm using the High Speed Counter Inputs (channel 1) to count the encoder signals and do what I need to do. This seems to be working well. How is the HSC Counter Value maintained for the HSC? Is the HSC counting interrupt driven and buffered? If the CPU is off executing the rest of the ladder and performing other tasks, it there a risk of counts being missed because the counter is not being read enough? Thanks.
MVP 2023 kratmel Posted October 18, 2023 MVP 2023 Report Posted October 18, 2023 As standard for all high-speed inputs of most PLCs, the counter value (Hardware provided) is directly related to the value that the PLC processor "sees". Therefore, it is usually stable and the HSC does not lose pulses in the entire range of the permissible frequency of pulses. The main problem is the processing of this value. Without interrupting the PLC program, you cannot accurately track the desired value if the counting rate is greater than the PLC program execution time. Therefore, if you set the condition = following the increasing value - there is a risk of missing the necessary one. Accordingly, set the condition >= for increasing and <= for decreasing value that needs to be processed in the PLC program. Both in the case of normal execution of the program and in the case of using an interrupt.
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